What is the Wire Wrap Odyssey?
The Wire Wrap Odyssey is a custom 8-bit microcoded CPU with a 16-bit address bus. It is built primarily from 7400-series logic (mostly HC series). There are no VLSI components in the core system at all, nearly everything is built around simple logic components such as 74x377 D flip flops, 74x245 bus transceivers, multiplexers, selectors, and a generous pile of simple logic gates.
But why?
As part of my computer science curriculum at Texas A&M University from 2000-2005, I took a computer architecture course where I learned how computers work at the fundamental level. The textbook for the course, Computer Organization and Design: The Hardware/Software Interface by David Patterson and John Hennessy, walked us through designing a 32-bit MIPS CPU, culminating in an actual working (virtual) CPU designed in Verilog.
Something about this course during my studies stuck with me, as I started to better understand how the early microcomputers such as the Apple I and Apple ][, Commodore 64, TRS-80, and even early x86 systems like the PC-XT with Intel's 8088 and 80286, were designed. These early computers were sufficiently simple that the entire architecture could be understood by a single person.
I also discovered the Homebuilt Computers Webring, which introduced me to dozens of ambitious projects being undertaken by mere mortals like myself, to build homemade computers. For example, the Magic-1 and the BMOW-1.
So in 2010, I began working on my own homebuilt computer. The Wire Wrap Odyssey is the result. Over a decade in the making (but realistically starting in earnest in 2019 after finally settling on wire wrap as the best way to construct the system), the Wire Wrap Odyssey has been a long LONG journey of dead ends, failed designs, questionable implementations, and tricky troubleshooting.
What you will find here
This website documents all of what went into making the Wire Wrap Odyssey work, including the parts I did wrong, the parts I think I did right, and all the documentation I've collected along the way.
All of my schematics and design notes are on paper, so I've scanned in these pages for you to peruse (see the Documentation section). However, I do not recommend that you attempt to replicate my work. There are far better designs out there if you are interested in tackling a project like this.
Site Contents
Overview - this page
Architecture - how the Wire Wrap Odyssey works, top to bottom. Includes callouts about where I made (in my opinion) bad architectural decisions, to help ward off others from making the same mistakes.
Peripherals - as I continue adding capabilities to the Wire Wrap Odyssey computer, I'll add pages here describing the new peripherals.
Video Card - the video card peripheral is sufficiently complex that it warrants its own section. It's also inextricably linked to the CPU itself, unlike other peripherals like the real time clock or UART.
Software - notes about the helper software I wrote to do things like program the control ROMs, the ALU, and assemble machine code.
Construction - why I chose wire wrapping and some tips for how I do it.
Lessons Learned - what I did wrong and how I would have done it better if given the chance to do it again
Photos / Videos - pictures and videos of the Wire Wrap Odyssey, at various stages of completion.
Documentation - scans of paper notes, links to source code.
Contact - how to reach me if you're so inclined.